A New Framework For Automatic Generation, Insertion and Verification of Memory Built-In Self Test Units

The design and architecture of a memory test synthesis framework for automatic generation, insertion and veriication of memory BIST units is presented. We use a building block architecture which results in full customization of memory BIST units. The exibility and eeciency of the framework are demonstrated by showing that memory BIST units with diierent architecture and characteristics could be generated, functionally veriied and inserted in a short time. Custom memory test algorithms could be loaded in the supported pro-grammable BIST unit and therefore any type of memory test algorithm could be realized.